Fsm3s

From HDLBits

See also: State transition logic for this FSM

The following is the state transition table for a Moore state machine with one input, one output, and four states. Implement this state machine. Include a synchronous reset that resets the FSM to state A. (This is the same problem as Fsm3 but with a synchronous reset.)

StateNext stateOutput
in=0in=1
AAB0
BCB0
CAD0
DCB1

Module Declaration

module top_module(
    input clk,
    input in,
    input reset,
    output out); 
//

    // State transition logic

    // State flip-flops with synchronous reset

    // Output logic

Fsm3.png

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