Fsm2s

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fsm2Previous

This is a Moore state machine with two states, two inputs, and one output. Implement this state machine.

This exercise is the same as fsm2, but using synchronous reset.

Fsmjks.png

Module Declaration

module top_module(
    input clk,
    input reset,    // Synchronous reset to OFF
    input j,
    input k,
    output out); 
//  

    parameter OFF=0, ON=1; 
    reg state, next_state;

    always @(*) begin
        // State transition logic
    end

    always @(posedge clk) begin
        // State flip-flops with synchronous reset
    end

    // Output logic
    // assign out = (state == ...);

Yes, there are ways to do this other than writing an FSM. But that wasn't the point of this exercise.
This is a JK flip-flop.

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