Mt2015 q4

mt2015_q4bPrevious

Nextringer

Taken from 2015 midterm question 4

See mt2015_q4a and mt2015_q4b for the submodules used here. The top-level design consists of two instantiations each of subcircuits A and B, as shown below.

Implement this circuit.

Module Declaration

module top_module (input x, input y, output z);

Hint...

You may choose to create this circuit hierarchically using the two submodules as shown in the diagram, or create the same functionality without hierarchy.

Write your solution here

[Load a previous submission]Load

module top_module( ); endmodule

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• exams/m2014_q4f
• exams/m2014_q4g
• gates
• 7420
• truthtable1
• mt2015_eq2
• mt2015_q4a
• mt2015_q4b ·

mt2015_q4

• · ringer
• thermostat
• popcount3
• gatesv
• gatesv100
• mux2to1
• mux2to1v
• mux9to1v

mt2015_q4bPrevious

Nextringer