From HDLBits


Create a 100-bit wide, 2-to-1 multiplexer. When sel=0, choose a. When sel=1, choose b.

Expected solution length: Around 1 line.

Module Declaration

module top_module( 
    input [99:0] a, b,
    input sel,
    output [99:0] out );

The ternary operator (cond ? iftrue : iffalse) is easier to read.

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